Technical University of Munich
Chair for Design Automation
Prof. Dr. Robert Wille
Arcisstrasse 21
80333 Munich | Germany
Tel: +49 89 289 23551

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The Chair for Design Automation is supported by the Bavarian State Ministry for Science and Arts through the Distinguished Professorship Program.

Der Lehrstuhl für Design Automation wird durch das Bayerische Staatsministerium für Wissenschaft und Kunst im Rahmen des Spitzenprofessurenprogramms gefördert.

Bavarian Coat of Arms

Design Automation for Field-coupled Nanocomputing

Field-coupled Nanocomputing (FCN) is a class of emerging post-CMOS integrated circuit technologies at the nano scale that include contestants with enhancements in terms of energy dissipation and feature size. Recent breakthroughs in the fabrication of these technologies indicate the possibility to realize molecular-sized elementary devices with ultra-low energy dissipation or with clock frequencies in the terahertz range. Furthermore, certain quantum-dot implementations are considered to become bridging technologies to enable interoperability between conventional CMOS circuitry and quantum computers.

Despite these promising characteristics, sophisticated automatic methods that compose FCN circuits from specifications are scarce. Due to the peculiarity and specificity of the FCN technologies’ design constraints, conventional physical design algorithms cannot be applied. In other words, design automation for an entire class of highly promising nanotechnologies that could potentially enable a future of powerful and green computational devices is still in its infancy.

Our Work

In our group, we conduct design automation for various FCN technologies and develop algorithms and software tools dedicated to accelerate the research on multiple levels. We are working at the intersection of computer science, physics, and material science to push the limits of atom-scale manufacturing with corresponding design automation methodologies. Our research is mainly focused on (but not limited to) the following topics:

  • Logic synthesis under technology constraints: Conventional logic synthesis aims at CMOS technologies where wire costs can be almost neglected. In FCN implementations, however, wire segments are fabricated from the same building blocks as gates and share both their area requirements and delay properties. Our logic synthesis approaches, thus, consider wire costs to obtain area and delay efficient circuit layouts.
  • Placement & routing for technology-independent layout generation: With a multitude of physical FCN implementations arising, most research focuses on providing solutions for specific technologies exclusively. Our approach is more holistic and abstracts from physical implementations as much as possible while paying close attention to common FCN traits. Consequently, our placement & routing algorithms for gate-level layout generation are used to obtain circuitry of all major FCN implementations, i.e., Quantum-dot Cellular Automata (QCA), Nanomagnet Logic (NML), and Silicon Dangling Bonds (SiDB). Via the utilization of satisfiability engines, these layouts can be exact in terms of area at the cost of runtime, or, contrary, via approximations and heuristics, non-optimal layouts with millions of elements can be generated in seconds.
  • Clocking and data synchronization: Clocking is one of the most peculiar FCN design challenge and differs greatly from its CMOS counterpart. It is a necessity for combinational and sequential circuits alike to be clocked because clocking directs the information flow and propagates signals in a pipeline-like fashion. This necessity complicates routing and introduces synchronization issues. We proposed a technology extension that exploits the clock signals to stall information and, thus, relieve some of these tedious constraints. To this end, utilizing clocks in this way allows leveraging area vs. throughput.
  • Layout validation and verification: Due to the aforementioned synchronization constraints, even purely logical simulation of FCN circuit layouts has to incorporate a notion of timing. Consequently, whether a layout is equivalent to its specification or to another layout is a much harder problem than conventional Boolean circuit equivalence. We are able to overcome this obstacle with the deductive power of satisfiability engines using a custom formulation that incorporates layout delay characteristics.
  • Technology mapping and optimization: Finally, technology-independent gate-level layouts need to be compiled down to the cell-level via the application of a precise FCN implementation. We apply established and custom machine learning-generated gate implementations for the major FCN technologies to map layouts to elementary cell-accurate descriptions that can be fed to physical simulators for further processing.

To make our research more accessible, we provide the Munich Nanotech Toolkit (MNT) that contains implementations of all proposed algorithms to make our scientific claims reproducible and to support open research as well as open data. The MNT tool fiction supports multiple FCN implementations, e.g., QCA, iNML, and SiDB, and corresponding state-of-the-art physical simulators, e.g., QCADesigner, ToPoliNano & MagCAD, and SiQAD such that designed layouts can be simulated on the quantum level. Last but not least, fiction additionally provides its entire functionality as a header-only library to enable anyone to build upon its data types and algorithms. The full online documentation can be found here.

More Information

Book (published by Springer Nature)
covering some of our methods

Munich Nanotech Toolkit

Awards and Accomplishments

  • Best Paper Award Candidate at ASP-DAC 2021 for the paper One-pass Synthesis for Field-coupled Nanocomputing Technologies
  • Best Student Forum Paper Award at ISVLSI 2020 for the thesis Design Automation of Field-coupled Nanotechnologies
  • Best Paper Award Candidate at ISVLSI 2020 for the paper Bail on Balancing: An Alternative Approach to the Physical Design of Field-coupled Nanocomputing Circuits
  • Best Research Demo Award at ISVLSI 2019 for the presentation of fiction

Selected Papers

As outlined above, we developed several algorithms and tools that are specialized for design automation of FCN devices. In the following, you can find a selected set of the resulting publications. A full list of papers is available.

  • M. Walter, S. S. H. Ng, K. Walus, R. Wille. Hexagons are the Bestagons: Design Automation for Silicon Dangling Bond Logic. Design Automation Conference (DAC), 2022. PDF Code on GitHub
  • M. Walter, W. Haaswijk, R. Wille, F. Sill Torres, and R. Drechsler. One-pass Synthesis for Field-coupled Nanocomputing Technologies. Asia and South Pacific Design Automation Conference (ASP-DAC), 2021. PDF Code on GitHub
  • M. Walter, R. Wille, F. Sill Torres, D. Große, and R. Drechsler. Verification for Field-coupled Nanocomputing Circuits. Design Automation Conference (DAC), 2020. PDF Code on GitHub
  • M. Walter, R. Wille, F. Sill Torres, and R. Drechsler. Bail on Balancing: An Alternative Approach to the Physical Design of Field-coupled Nanocomputing Circuits. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2020. PDF
  • M. Walter, R. Wille, D. Große, F. Sill Torres, and R. Drechsler. fiction - An Open-Source Framework for the Design of Field-coupled Nanocomputing Circuits. International Workshop on Logic Synthesis (IWLS), 2019. fiction is available on GitHub
  • R. Wille, M. Walter, F. Sill Torres, D. Große, and R. Drechsler. Ignore Clocking Constraints: An Alternative Design Methodology for Field-coupled Nanotechnologies. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019. PDF
  • M. Walter, R. Wille, D. Große, F. Sill Torres, and R. Drechsler. Placement & Routing for Tile-based Field-coupled Nanocomputing Circuits is NP-complete. Journal for Emerging Technologies in Computing Systems (JETC), 2019. PDF
  • M. Walter, R. Wille, F. Sill Torres, D. Große, and R. Drechsler. Scalable Design for Field-coupled Nanocomputing Circuits. Asia and South Pacific Design Automation Conference (ASP-DAC), 2019. PDF Code on GitHub
  • F. Sill Torres, M. Walter, R. Wille, D. Große, and R. Drechsler. Synchronization of Clocked Field-Coupled Circuits. IEEE International Conference on Nanotechnology (IEEE NANO), 2018. PDF
  • M. Walter, R. Wille, D. Große, F. Sill Torres, and R. Drechsler. An Exact Method for Design Exploration of Quantum-dot Cellular Automata. Design, Automation and Test in Europe Conference and Exhibition (DATE), 2018. PDF Code on GitHub


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